EXPERIENCE


Technical Expert, ADAS Embedded Software

Ford Motor Company (Dearborn, MI)
December 2022 – present

Technical Advisor

Excelsior Engineering LLC (Rochester, MI)
December 2022 – present

Founder & President

Excelsior Engineering LLC (Rochester, MI)
May 2021 – December 2022

Embedded systems consulting, specializing in high-performance systems using hardware acceleration with FPGAs and ASICs.

Lecturer

Oakland University (Rochester, MI)
January 2022 – May 2022

Lecturer for ECE 2700, an FPGA-based digital logic design course

Co-Founder & Principal Engineer

MicroNova LLC (Waterford, MI)
May 2012 – May 2021

Developed industrial control systems based on Xilinx Zynq-7000 SoC running PetaLinux. Designed Xilinx Spartan-3A and Artix-7 FPGA development boards in a compact DIP form-factor, with cross-platform C application for programming SPI NOR flash via USB, and example code in VHDL. Developed embedded C firmware for wireless battery-operated assistive technology device. Designed system architecture for open-source Raspberry Pi-based home audio controller.

Research Engineer

Ford Motor Company (Dearborn, MI)
January 2017 – January 2021

Part of in-house software team for automated driving. Helped deliver industry-first advanced trailering features for the Ford F-150. Ported computer vision and machine learning algorithms to ARM-based embedded systems-on-chip (SoCs). Spearheaded efforts to accelerate driver assist algorithms through the use of special-purpose hardware accelerators. Set up Docker-based CMake build environment, Jenkins continuous integration system, and QNX operating system image build scripts. Provided support to algorithm research team and production software team. Evaluated and benchmarked candidate SoCs for use in future driver assist modules.

Electrical Engineer

RHK Technology and Sonic Alert (Troy, MI)
April 2013 – January 2017

Developed FPGA firmware in VHDL and Verilog for high-speed digital signal processing in scanning probe microscope controllers. Designed and implemented special-purpose processors, communication interfaces, FIR and IIR filters, CORDICs and control loops. Extensive experience with FPGA timing analysis and closure. Driver development in Forth. Isolated sources of error in high-speed DAC & ADC interfaces used for piezoelectric control; developed a novel architecture-sympathetic delta-sigma modulator to improve conversion resolution while mitigating non-linearities. Project manager for R&D lab based at Oakland University. Supervised development of several FPGA design projects, including a native Forth soft processor, and a reconfigurable signal routing system.

Developed C firmware and wireless mesh protocol for an assistive technology system to aid the deaf and hard of hearing. Worked with RF engineering team to ensure FCC compliance. Developed C firmware for Bluetooth-based signaling devices, along with accompanying iOS and Android apps. Developed software for production automation and testing. Supervised manufacturing at factory in Shenzhen, China.

Engineering Intern

RHK Technology (Troy, MI)
September 2010 – April 2013

Designed and implemented several FPGA components in VHDL:
- Custom Ethernet controller with UDP and IP layers implemented in hardware to accelerate throughput of microscope imaging data, and reduce command latency. Software driver in Forth. Testing with Wireshark and MATLAB.
- Digital phase shifter based on an Hilbert FIR filter, to control an atomic force microscope (AFM) cantilever via self-oscillation mode. Filter prototyping and analysis using MATLAB DSP Toolbox.
- Polynomial time generator (PTG) system for non-linear piezoelectric control, to improve microscope scan time and image quality.

Research and Teaching Assistant

Oakland University (Rochester, MI)
January 2010 – April 2013

Research assistant in the OU High-Performance Embedded Systems Lab. Researched methods of generating special-purpose hardware from stack-based intermediate representations of high-level software languages (e.g. Java-to-VHDL, C#-to-Verilog, etc).

Lab instructor and guest lecturer for microcontroller design course (C and HCS12 assembly with CodeWarrior) and FPGA digital logic and microprocessor design course (VHDL with Xilinx ISE).

 

PUBLICATIONS & PATENTS


“Vehicle Hitch Ball Detection System”, US Patent 10,780,752 – Luke Niewiadomski, Mark Bowers, Nikhil Nagraj Rao, Rick Haubenstricker, Richard Campbell, Lihui Chen - Issued September 22, 2020. (PDF)

”Flexible Embedded System Design using Flowpaths” – Darrin Hanna, Bryant Jones, Lincoln Lorenz, and Mark Bowers, Proceedings of the 2011 International Conference on Embedded Systems and Applications, Las Vegas, NV, July 18-21, 2011. (PDF)

”Generating Hardware from Java Using Self-Propagating Flowpaths” – Darrin Hanna, Bryant Jones, Lincoln Lorenz, and Mark Bowers, Proceedings of the 2011 International Conference on Embedded Systems and Applications, Las Vegas, NV, July 18-21, 2011. (PDF)

EDUCATION


B.S.E. Computer Engineering
Oakland University (Rochester, MI)
September 2007 – April 2011
M.S. Embedded Systems
Oakland University (Rochester, MI)
September 2011 – April 2013

Projects

  • Stereoscopic object tracking system based on a Spartan-6 FPGA. System detected a brightly colored object and computed X/Y position and approximate depth. Vision processing pipeline written in VHDL. Prototyping with MATLAB.

  • FPGA-based Mandelbrot/Julia fractal set explorer. Built several versions, including a highly-pipelined special-purpose processor with smart dispatcher written in VHDL, and a hybrid system using the Altera Nios II soft processor.

  • VGA graphics controller. Built several versions, including a bit-banging method using HCS12 assembly, a hybrid system for the Cypress PSoC-1, and a Verilog version tested on FPGA and fabricated on a 1mm x 1mm VLSI chip on MOSIS 0.5µm process.

  • Software-defined LF radio transceiver with ASK and PSK modem, based on a Cypress PSoC-1.

  • Levitating ping pong ball using a fuzzy control loop, implemented on HCS12 microcontroller in C and assembly.


SKILLS


Languages
Fluent: Embedded C/C++, Python, VHDL, Verilog, HCS12 assembly
Proficient: Forth, C#, Swift, Java, MATLAB, NXP APEX kernel programming, Cypress M8C assembly
Learning: CUDA, Objective-C, ARM assembly, m68k assembly
Software
Fluent: Xilinx Vivado and ISE, Jenkins, CMake, Docker, Altera Quartus II, Aldec ActiveHDL, Microchip MPLAB X, Atmel Studio, Freescale CodeWarrior, Microsoft Visual Studio, Cypress PSoC Designer, Git, SVN, Bash scripting
Proficient: MATLAB, OpenCV, TensorFlow, Xilinx PetaLinux, Apple Xcode, Android Studio, ModelSim, Wireshark, QNX
Learning: Altium Designer, Mentor Graphics IC Station, Cadence PSpice, Simulink